Latches and level shifters may be used in a variety of semiconductor devices including memory devices such as static random access memory (SRAM) devices. An SRAM is a semiconductor memory device that stores bits of data. SRAM devices generally have two main portions—the memory cells for storing bits of data and the control circuitry for operating/controlling the SRAM device. The control circuitry may include one or more latches and/or level shifters.
SRAM devices may be built using complementary metal-oxide semiconductor (CMOS) technology. In SRAM devices utilizing CMOS technology, increasing the supply voltage with level shifting circuitry generally increases the speed and reliability of the memory cells within the SRAM device but also causes an increase in leakage from other components within the SRAM control circuitry. A dual-rail SRAM device utilizes two power rails to address this issue. In a dual-rail SRAM, a first, lower voltage is provided to operate certain portions of the SRAM control circuitry and a second, generally higher, voltage is utilized for the memory cells and corresponding drivers. To step from the first voltage to the second voltage, a level shifter is utilized within the SRAM to shift the voltage level from the lower voltage of the control circuitry to the higher voltage of the memory cells.
In addition to the level shifter, separate latches are also incorporated into SRAM devices as part of the control circuitry of the SRAM device to write data into the corresponding memory cell. The inclusion of separate level shifters and latches into an SRAM device causes the SRAM device to occupy substantial area and introduces gate delay latency as a result of the control signal setup time, in addition to the typical leakage penalty noted above.